31 January 2013: IERUS Technologies Inc. is pleased to announce the initial release of its flagship computational electromagnetics (CEM) package V-Lox. The namesake comes from the Latin velox, meaning “speed.” V-Lox utilizes advanced techniques to execute in a computationally efficient manner — translating to larger problems that can be solved quickly on modest computer resources. V-Lox has been demonstrated on real-world problems with over 1M unknowns and can solve problems with 150k unknowns in as little as 1 hour. The initial release comes with an efficient out of core solver, meaning that problem sizes are limited only by the available hard drive space. “This software is a very powerful tool that IERUS has been using for quite some time internally to conduct antenna and material designs and for solving scattering problems. We knew the limitations of current tools and had to design V-Lox so that we could solve massive problems in the short time available and without the prohibitive costs of other less capable packages,” said IERUS Executive Vice President Michael Roesch. Version 2.0 is expected to be released third quarter CY 2013. The next release will contain multi-GPU hardware based acceleration. GPUs have been used in the past for software acceleration but IERUS personnel were the first to use GPU acceleration for fast direct solvers. “With modern GPUs, we are able to observe ~10X speed-up on large, practical problems in our daily, industrial use of V-Lox. This is compared to the highly optimized CPU implementation of V-Lox running on the best available Intel processors,” said Chief Engineer and V-Lox lead designer Dr. Daniel Faircloth. IERUS Technologies Inc. is a HUBZone certified company based in Huntsville, AL, and is in a Department of Defense-sponsored Mentor-Protégé relationship with Lockheed Martin Space Systems Company. IERUS provides systems engineering, program management, and analysis support in the defense and commercial sectors. IERUS specializes in RF spectrum design and analysis, globally optimized based design and hardware/software acceleration techniques.